1. Field of the Invention
Embodiments of the present invention relate generally to image processing and more specifically to a configurable multi-tap filter.
2. Description of the Related Art
Vertical scaling is used in image processing to increase or reduce the number of vertical lines from a source image to a destination image. In such a process, a source image is scaled by a scaling factor. For example, a one-half size destination image is achieved by multiplying the source image by a scaling factor of 0.5.
Vertical filtering is used to reduce undesired artifacts, such as aliasing, that result from vertical scaling. Typically, a source image is filtered by a vertical filter prior to vertical scaling. A vertical filter uses two or more source image lines to generate a filtered image. Each source image line is processed within a stage of the vertical filter. Each stage of the vertical filter is commonly referred to as a “tap.” For example, a vertical filter that uses two source image lines is referred to a two-tap vertical filter. Generally, different scaling factors require different types of vertical filters. For example, a relatively small scaling factor may require a five-tap vertical filter, while a relatively large scaling factor may require a two-tap vertical filter.
Each source image line for the vertical filter is stored in a line store. Typically, line stores are implemented with random access memory (RAM), and the length of the line store corresponds to the longest source image line that is processed by the vertical filter.
A configurable vertical scaler is a vertical scaler that can scale a source image by more than one scaling factor. A configurable vertical scaler has the advantage of reducing the number of discrete vertical scalers required for a given system. The configurable vertical scaler may require a configurable vertical filter. For example, if the configurable vertical scaler is able to scale a source image by a range of scaling factors that require both a two-tap and a three-tap vertical filter, then the configurable vertical filter can be used to provide the functionality of both of these vertical filters.
Configurable vertical filters require a configurable set of line stores. However, existing configurable line stores have relatively inefficient RAM usage, especially in certain configurations. To understand the drawbacks of the current art, consider a two-tap, a three-tap and a five-tap vertical filter. FIG. 1A is a conceptual diagram of a two-tap vertical filter 100, according to the prior art. The two-tap vertical filter 100 includes a first line store 102, a second line store 104 and a two-tap filter 106. The two-tap filter 106 may be any two-tap filter that provides a desired frequency response. The source image pixels are input into the first line store 102. The output of the first line store 102 is coupled to the two-tap filter 106 and to the input of the second line store 104. The output of the second line store 104 is coupled to the two-tap vertical filter 106. Each source image line required by the two-tap filter 106 is stored in the line stores 102 and 104. The length of the line store corresponds to the longest source image line that is processed by the two-tap vertical filter 100. Furthermore, the width of the line store must be wide enough to support the width of the pixels of the source image line.
FIG. 1B is a conceptual diagram of a three-tap vertical filter 110, according to the prior art. The three-tap vertical filter 110 includes a first line store 112, a second line store 114, a third line store 116 and a three-tap filter 118. The three-tap filter 118 may be any three-tap filter that provides a desired frequency response. The source image pixels are input into the first line store 112. The output of the first line store 112 is coupled to the three-tap filter 118 and to the input of the second line store 114. The output of the second line store 114 is coupled to the three-tap vertical filter 116 and the input of the third line store 116. The output of the third line store 116 is coupled to the three-tap filter 118. As in the case of the two-tap vertical filter 100, each source image line required by the three-tap filter 118 is stored in the line stores 112, 114, and 116. Further, the length and width requirements of the line stores described above in connection with the two-tap vertical filter 100 apply with equal force to the three-tap vertical filter 110.
FIG. 1C is a conceptual diagram of a five-tap vertical filter 120, according to the prior art. The five-tap vertical filter 120 includes a first line store 122, a second line store 123, a third line store 124, a fourth line store 125, a fifth line store 126 and a five-tap filter 128. The five-tap filter 128 may be any five-tap filter that provides a desired frequency response. The source image pixels are input into the first line store 122. The output of the first line store 122 is coupled to the five-tap filter 128 and to the input of the second line store 123. The output of the second line store 123 is coupled to the five-tap vertical filter 128 and the input of the third line store 124. The output of the third line store 124 is coupled to the five-tap filter 128 and the input of the fourth line store 125. The output of the fourth line store 125 is coupled to the five-tap filter 128 and the input of the fifth line store 126. The output of the fifth line store 126 is coupled to the five-tap filter 128. As in the case of the two-tap vertical filter 100, each source image line required by the five-tap filter 128 is stored in the line stores 122, 123, 124, 125 and 126. Again, the length and width requirements of the line stores described above in connection with the two-tap vertical filter 100 apply with equal force to the five-tap vertical filter 120.
FIG. 1D is a conceptual diagram of a configurable vertical filter 150, according to the prior art. The configurable vertical filter 150 includes a configurable memory 151 and filter 158. The configurable memory 151 is configured as five line stores—a first line store 152, a second line store 153, a third line store 154, a fourth line store 155 and a fifth line store 156. Source image pixels are input to the first line store 152. The output of the first line store 152 is coupled to the filter 158 and to the input of the second line store 153. The output of the second line store 153 is coupled to the filter 158 and the input of the third line store 154. The output of the third line store 154 is coupled to the filter 158 and the input of the fourth line store 155. The output of the fourth line store 155 is coupled to the filter 158 and the input of the fifth line store 156. The output of the fifth line store 156 is coupled to the filter 158. The filter 158 can be configured to implement any two-tap, three-tap or five-tap filter with a desired frequency response.
As is well-known, by appropriately configuring the configurable memory 151 and the filter 158, the configurable vertical filter 150 may be configured to provide the functionality of either the two-tap vertical filter of FIG. 1A, the three-tap vertical filter of FIG. 1B or the five-tap vertical filter of FIG. 1C. For example, when the configurable vertical filter 150 is configured to implement the five-tap vertical filter 120 of FIG. 1C, the five line stores 152, 153, 154, 155 and 156 are used to store the source image lines and the vertical filter 158 is configured to implement a five-tap filter. In this case, since all five line stores are utilized, one hundred percent of the configurable memory 151 is used. However, when the configurable vertical filter 150 is configured to implement the three-tap vertical filter 110 of FIG. 1B only the first line store 152, the second line store 153 and the third line store 154 are used to store the source image lines. Since only three of the five line stores are utilized, only sixty percent of the configurable memory 151 is used. Similarly, when the configurable vertical filter 150 is configured to implement the two-tap vertical filter 100 of FIG. 1A, only forty percent of the configurable memory 151 is used since only two of five line stores are utilized.
As the foregoing illustrates, a substantial amount of RAM may not be used in certain vertical filter implementations. As a general matter, having unused or underutilized RAM is undesirable because it reflects wasted die space, which is a precious commodity in densely populated integrated circuit designs.
In addition, because different pixel formats oftentimes are represented with different numbers of bits, supporting different pixel formats also may result in unused or underutilized RAM in current vertical filter designs. Consider a typical RGB pixel. Each pixel has three components, red, green and blue, and each of these components has a common bit width. If the red, green and blue components are each eight bits wide, then the RGB pixel is twenty-four bits wide. Next consider the YUV422 pixel structure, which requires two luminance (Y) components for every red color-difference (Cr) and blue color-difference (Cb) component. Thus, YUV422 pixels are always grouped in pairs, where a first YUV422 pixel includes all three components (Y, Cb and Cr), while a second YUV422 pixel includes only the luminance (Y) component. Therefore, if the Y, Cb and Cr components are each eight bits wide, then the YUV422 pixel pair is thirty-two bits wide. As described in FIG. 1A, a line store is designed to be wide enough to support the widest pixel format that the associated vertical filter is required to process. Since the YUV422 pixel is wider than the RGB pixel, the line stores of a vertical filter designed to process both RGB and YUV422 pixels are designed to be thirty-two bits wide. Thus, when processing RGB pixels, eight bits of width of each line store in the vertical filter are unused, further increasing the overall amount of unused or underutilized RAM in the vertical filter.
As the foregoing illustrates, what is needed in the art is a configurable vertical filter that uses RAM more efficiently than current vertical filter designs.